RaspberryPi CM4 uses Python to access external EEPROMs via SPI communication, but cannot read or write values.

EEPROM (M95M04-DR) is connected via SPI from raspy.
I'm trying to read and write EEPROM using Python, but
The registers cannot be read or set before memory data is retrieved.
I'm struggling because I don't know the reason because it's my first time working.
Please let me know if there are any syntax errors, misconceptions, or corrections.

import spreadv
import time

READ=0x03#00000011 read
RDSR = 0x05#0000101 read status register
WRSR=0x01#00000001 write status register

spi=spidev.SpiDev()
spi.open(0,0)
spi.max_speed_hz = 10000000
spi.mode=3

# write register
spi.xfer2 ([WREN])
time.sleep(0.1)
spi.xfer2([WRSR,0x0A])# See if you can configure anything for now

# read register
res=spi.xfer2([RDSR, RDSR]) [1]
Assume print("res:"+str(res))#1 byte(SRWD/0/0/BP1/BP0/WEL/WIP)
time.sleep(0.1)

#read
data=spi.xfer2 ([READ, 0x00200, 0x00])
print("data"+str(data))

res:255 (sometimes 253, why...?)  
data —[255,255,255] (occasionally [255,255,127].Why...?)

python python3 raspberry-pi

2022-09-30 22:05

2 Answers

There seems to be a misunderstanding about SPI communication. It's good to understand along with the behavior of xfer2.

SPI is

Microcomputer to CS#=L
Microcomputer outputs commands from MOSI
- My microcomputer is reading MISO the other day, but the signal state is meaningless, so I have an obligation to ignore the results
Tip replies to MISO
- Microcomputer must still output MOSI
- The chip side is obliged to ignore the MOSI during this time
The microcomputer should CS#=H and terminate one physical transaction

My microcomputer is reading MISO the other day, but the signal state is meaningless, so I have an obligation to ignore the results

Microcomputer must still output MOSI
The chip side is obliged to ignore the MOSI during this time

This is the hardware protocol, so xfer2 performs this set of actions in bulk.

Read StatusThe 05h command is

as described above.

Send 05h to MOSI (but microcomputer is obliged to read MISO the other day)
MISO comes back with a value of 8 bits (but the microcomputer is still obliged to output it to MOSI during this time)

Therefore, it is convenient to transfer 16 bits, and the microcomputer sends 05h in the first half and receives status in the second half.

xfer2() is designed to receive a list of byte values as an argument and return a list of byte values as a result.

result=spi.xfer2 ([5, Any Garbage Value])

By doing so,

Convenient 16-bit transfer
MOSI displays garbage values that are good for anything in the second half of 05h
- The chip interprets it as Read status upon receipt of 05h and ignores the garbage value
MISO gets the first 8 bits for result[0] and the second 8 bits for result[1]
As I have already written, microcomputer software...
- result[0] must be ignored
- result[1] should be the answer to Read status

The chip interprets it as Read status upon receipt of 05h and ignores the garbage value

result[0] must be ignored
result[1] should be the answer to Read status

The behavior is

2022-09-30 22:05

Thank you for your reply when you are busy.
I understood a little more about how xfer2 works.
Thank you.

Based on what you gave me, I changed the source a little, but
The value obtained the register setting remained unchanged at 255.
There may be something else wrong with the master, slave, or both.
I would like to continue learning.

#read register
res=spi.xfer2 ([RDSR, 0x00])
print("res:"+str(res[1]))
res —255

2022-09-30 22:05

If you have any answers or tips

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